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 74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
April 1988 Revised August 1999
74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The 74F545 is an 8-bit, 3-STATE, high-speed transceiver. It provides bidirectional drive for bus-oriented microprocessor and digital communications systems. Straight through bidirectional transceivers are featured, with 24 mA bus drive capability on the A Ports and 64 mA bus drive capability on the B Ports. One input, Transmit/Receive (T/R) determines the direction of logic signals through the bidirectional transceiver. Transmit enables data from A-to-B Ports; Receive enables data from B-to-A Ports. The Output Enable input disables both A and B Ports by placing them in a 3-STATE condition.
Features
s Higher drive than 8304 s 8-bit bidirectional data flow reduces system package count s 3-STATE inputs/outputs for interfacing with bus-oriented systems s 24 mA and 64 mA bus drive capability on A and B Ports, respectively s Transmit/Receive and Output Enable simplify control logic s Guaranteed 4000V minimum ESD protection
Ordering Code:
Order Number 74F545SC 74F545PC Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
(c) 1999 Fairchild Semiconductor Corporation
DS009556
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74F545
Unit Loading/Fan Out
U.L. Pin Names OE T/R A0-A7 Description HIGH/LOW Output Enable Input (Active LOW) Transmit/Receive Input Side A 3-STATE Inputs or 3-STATE Outputs B0-B7 Side B 3-STATE Inputs or 3-STATE Outputs 1.0/2.0 1.0/2.0 3.5/1.083 150/40 (33.3) 3.5/1.083 600/106.6 (80) Input IIH/IIL Output IOH/IOL 20 A/-1.2 mA 20 A/-1.2 mA 70 A/-650 A -3 mA/24 mA (20 mA) 70 A/-650 A -12 mA/64 mA (48 mA)
Truth Table
Inputs OE L L H
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance
Outputs T/R L H X Bus B Data to Bus A Bus A Data to Bus B High Z
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F545
Absolute Maximum Ratings(Note 1)
Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) ESD Last Passing Voltage (Min) twice the rated IOL (mA) 4000V -0.5V to VCC -0.5V to +5.5V -65C to +150C -55C to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA
Recommended Operating Conditions
Free Air Ambient Temperature Supply Voltage 0C to +70C +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol VIH VIL VCD VOH Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage 10% VCC 10% VCC 10% VCC 5% VCC 5% VCC VOL IIH IBVI IBVIT ICEX VID IOD IIL IIH + IOZH IIL + IOZL IOS IZZ ICCH ICCL ICCZ Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input HIGH Current Breakdown (I/O) Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output Leakage Current Output Leakage Current Output Short-Circuit Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 70 95 85 -60 -100 4.75 3.75 -1.2 70 -650 -150 -225 500 90 120 110 10% VCC 10% VCC 2.5 2.4 2.0 2.7 2.7 0.5 0.55 5.0 V A A mA A V A mA A A mA A mA mA mA Min V Min Min 2.0 0.8 -1.2 Typ Max Units V V V Min VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA (OE, T/R) IOH = -1 mA (An) IOH = -3 mA (An) IOH = -15 mA (Bn) IOH = -1 mA (An) IOH = -3 mA (An) IOL = 24 mA (A n) IOL = 64 mA (B n) VIN = 2.7V (OE, T/R) VIN = 7.0V (OE, T/R) VIN = 5.5V (An, Bn) VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (OE, T/R) VOUT = 2.7V (An, Bn) VOUT = 0.5V (An, Bn) VOUT = 0V (An) VOUT = 0V (Bn) VOUT = 5.25V VO = HIGH VO = LOW VO = HIGH Z
Max
7.0 0.5 50
Max Max Max 0.0 0.0 Max Max Max Max 0.0V Max Max Max
3
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74F545
AC Electrical Characteristics
TA = +25C Symbol Parameter Min tPLH tPHL tPZH tPZL tPHZ tPLZ Output Disable Time Propagation Delay An to Bn or Bn to An Output Enable Time 2.5 2.5 3.0 3.5 3.0 2.0 VCC = +5.0V CL = 50 pF Typ 4.2 4.6 5.3 6.0 5.0 5.0 Max 6.0 6.0 7.0 8.0 6.5 6.5 TA = -55C to +125C VCC = +5.0V CL = 50 pF Min 2.0 2.0 2.5 3.0 2.5 2.0 Max 7.5 7.5 9.0 10.0 9.0 10.0 TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 2.5 2.5 3.0 3.5 3.0 2.0 Max 7.0 7.0 8.0 9.0 7.5 7.5 ns ns Units
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74F545
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B
5
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74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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